PHLEGM v9 r68 - SPC700 DATA-DRIVEN LOAD-TIME MICRO-CODE OPTIMIZATION
========================================================================

Changes from r67
----------------
- Compile all 256 SPC700 instructions from the support-chip .phlegm table,
  then compact equivalent adjacent micro-operations at machine load.
- Fuse FETCH8 + DIRECT + READ8 into FETCH_DP_READ.
- Fuse FETCH8 + DIRECT into FETCH_DP.
- Fuse FETCH16 + READ8 into FETCH_ABS_READ.
- Add generic flags-preserving BFLAGSET, BFLAGCLEAR, and TESTNE primitives.
  Six flag branches and two CBNE instructions now use them via .phlegm.
- Record before/after SPC700 operation counts and fused sequence counts in
  console compilation diagnostics, APU monitor, and SNES core dumps.
- Include the SPC program-counter address in the APUIO0-write trace event to
  distinguish writes from the uploaded sound driver when it stalls.
- Preserve all 256 opcode classifications and instruction-cycle declarations.
- Do not ship game ROMs, boot firmware, or game-specific patches.
- Preserve saved-session format. Optimization is regenerated per machine load.
- Retain existing r67 build identifier fix and general micro-code optimizer.

Validation performed
--------------------
node tests/SPC700-Optimizer-r68.Tests.js
  PASS: 256 definitions, 12,000 randomized fused-operation read-order / PC /
  register-state parity checks, 1,536 conditional-branch cases.
  r67 table: 1,138 SPC700 micro-operations total.
  r68 definition script: 1,104 operations before load-time optimization.
  r68 optimized script: 925 operations, 102 opcode programs optimized.
  Net reduction vs. r67: 213 static operations (~18.7%).
  This is NOT an 18.7% FPS performance measurement.

node tests/Microcode-Optimizer-r67.Tests.js
  PASS: r67 generic micro-code compiler invariants + 20,000 model cases;
  metadata assertions extended to revision 68.

Unverified / outstanding
------------------------
- The Windows/Linux FreeBASIC targets were not natively compiled in this
  environment (fbc was not available). Build success is not established.
- No measured ActRaiser FPS improvement or resolution of the AA/BB wait.
- The earlier logs identify a live SPC700 driver writing APUIO0=$01; it is
  NOT evidence that a missing S-DSP synthesizer itself caused the CPU loop.
- Audio synthesis (S-DSP) and genuine IPL ROM execution are incomplete.
- The new write-PC event in future core dumps is intended to isolate the
  reason the main CPU requests the AA/BB ready response a second time.

Data-driven boundary
--------------------
The machine's support-chip clock and the SPC700 instruction scripts remain
in cfg/**/*.phlegm. All optimization patterns are reusable source-independent
VM peephole primitives selected at load, not ROM-specific fast paths.
